The present invention relates to high voltage semiconductor switching devices known as high voltage transistors, power MOSFETs, IGBTs, thyristors, and MCTs.
High voltage transistors, power metal oxide silicon field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), thyristors, and MOS controlled thyristors (MCTs), hereinafter referred to as high voltage devices, are fabricated by conventional semiconductor processing techniques on a single crystalline semiconductor substrate such as a silicon wafer. Conventional semiconductor processing techniques include doping and implanting, lithography, diffusion, chemical vapor deposition (CVD), wet and dry etching, sputtering, epitaxy, and oxidizing. A complex sequence of these processing techniques is required to produce a high voltage device having a breakdown voltage within the 30 to 1,800 volt range.
The performance characteristics of the resulting high voltage device are dependent upon the resistivity (or doping concentration) and thickness of the crystalline semiconductor substrate. This is especially true for those devices having a breakdown voltage near the upper end of the 30 to 1,800 volt range. To fabricate the device, one provides a heavily doped semiconductor substrate which consequently has low resistivity. A highly resistive epitaxial layer is formed overlying a top surface of the semiconductor substrate. This combination including the highly resistive epitaxial layer produces a device having a high breakdown voltage.
However, the highly resistive epitaxial layer also decreases the efficiency of the device. In particular, the highly resistive epitaxial layer creates a large on-state voltage drop through the device. This increases energy loss through heat dissipation. Increasing the amount of heat dissipated produces a resulting device with a higher operating temperature, thereby decreasing the amount of current flowing through the device. This current reduction effectively decreases the functional efficiency of the device. To control this functional efficiency, one tailors the thickness and doping level of the epitaxial layer and substrate to produce a desired resistance level between them. A functionally efficient device is produced by limiting the thickness of the highly resistive epitaxial layer.
For transistors having a breakdown voltage above 1,000 volts, the thickness of the epitaxial layer overlying the substrate typically exceeds 150.mu.. In addition, this epitaxial layer must also have high resistivity. Present fabrication techniques for forming this thick highly resistive epitaxial layer include methods of chemical vapor deposition, or the like. These techniques are extremely slow and very difficult to control at their high processing temperatures and low impurity requirements. Thus, present fabrication techniques produce significantly low device yields, and are not cost effective in producing the device having the high breakdown voltage.
As for thyristors, one typically provides non-epitaxial substrates, also called bulk substrates, for fabrication. The substrates include a single-type doped and concentration doped wafer. The single-type doped wafer has a uniform doping level throughout the substrate. Alternatively, the concentration-doped wafer possesses a dopant profile having a concentration gradient. However, high voltage applications typically require a neutron transmuted substrate. These substrates rely on neutron irradiation to transmute a desired amount of silicon atoms into phosphorus atoms within the crystalline structure. This process forms the highly resistive n-type neutron transmuted wafer for high voltage applications.
For thyristors having a single-type doped wafer, the desired breakdown voltage is achieved by tailoring the overall thickness of the substrate. The thickness of the substrate is adjusted to produce a desired resistivity, thereby producing its corresponding breakdown voltage. The minimum thickness of the wafer depends, however, upon a thickness having sufficient structural integrity which can be processed without unreasonable breakage. So far, state-of-art wafer handling techniques by operators and equipment limit the thickness of these wafers by processing thicker-than-needed wafers. These thicker-than-needed wafers have increased mechanical stability, and therefore ensure that costly handling losses do not occur. As such, the resulting devices have higher-than-needed on-state voltage drops, higher energy losses during switching, and diminished performance.